30 December 2023
- 21:3021:30, 30 December 2023 diff hist +8 Component/Equal No edit summary
- 21:2921:29, 30 December 2023 diff hist +14 Component/Register No edit summary
- 21:2721:27, 30 December 2023 diff hist +6 Component/Counter No edit summary
- 21:2621:26, 30 December 2023 diff hist +4 Component/1 Bit memory No edit summary
- 21:2521:25, 30 December 2023 diff hist +16 Component/XNOR No edit summary
- 21:2421:24, 30 December 2023 diff hist +28 Component/XOR No edit summary
- 21:2321:23, 30 December 2023 diff hist +7 Component/NOR No edit summary
- 21:2021:20, 30 December 2023 diff hist +21 Component/OR No edit summary
- 21:1821:18, 30 December 2023 diff hist +21 Component/AND No edit summary
- 21:1621:16, 30 December 2023 diff hist +6 Component/Switch No edit summary
- 21:1521:15, 30 December 2023 diff hist +19 Component/NOT No edit summary
- 21:1421:14, 30 December 2023 diff hist +13 Component/OFF No edit summary
- 21:1321:13, 30 December 2023 diff hist +13 Component/ON No edit summary
- 21:1021:10, 30 December 2023 diff hist +606 N Component/Register Created page with "The Register acts as a unit of memory. It is available in 8-bit, 16-bit, 32-bit, and 64-bit varieties. There are 3 inputs and a single output. The Load pin controls whether or not the current value is being output on the Output pin. The value is only output when there is an ON (1) signal on the Load pin. The Save pin controls whether or not the current value gets overwritten by the value that is detected on the Save Value. When an ON (1) signal is detected on the Save..."
- 21:0421:04, 30 December 2023 diff hist +636 N Component/Counter Created page with "The 8 Bit Counter component behaves somewhat like a register, in that it starts with a value of 0 and can have its value changed. It has two inputs, an Overwrite Value which can be used to change the counter's value on the next tick; and an Increment/Overwrite toggle. The default behavior is to increment by one on each cycle if an OFF signal is connected to the Increment/Overwrite input. If an ON signal is connected to Increment/Overwrite, it will change the value of th..."
- 20:5720:57, 30 December 2023 diff hist +288 N Component/Delay Line (word) Created page with "The 8 Bit Delay Line functions the same way as the 1-bit Delay Line. It accepts a value on the input, and then outputs that same value on the next tick. This component exists in 8-bit, 16-bit, 32-bit, and 64-bit varieties. The variants all allow numbers of different sizes to be output."
- 20:5520:55, 30 December 2023 diff hist +336 N Component/Equal Created page with "The Equal component checks two values for equality. If the values on both inputs are the same, an ON (1) response is output. If they are different, an OFF (0) response is output. This component exists in 8-bit, 16-bit, 32-bit, and 64-bit varieties. In all cases, a single bit is output, regardless of how many bits are being compared."