Save breaker changes

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This page descibes the early access verion 2.0.10 alpha. It may not be completely correct for the the current stable version, nor the latest unstable version. Help us update it, and you get a cookie.

Save breaker is the alpha development branch on Steam.

While there is some support for converting a stable save game to save_breaker it is NOT possible to switch back and forth, switching from save_breaker back to stable will break your save. Rendering it unusable in either version.

Make a backup of the save folder, see in game options main menu for the location.

This is a brief overview of the main changes from stable (version 0.1059).

Variable width

Both wires and built-in components have configurable widths instead of separate 8-, 16-, 32-, and 64- bit versions, these now have a single component which has a configurable width.

New Assembler

The Program block removed (as has the old alpha Assembler).

Instead use a RAM, with a load port, and set the Initial data drop down to Assembler in the bottom panel.

This provides much greater flexibility in instruction formats, see spec.isa for more details.

Scoring

The main scoring mechanic is now gates * delay * ticks instead of the summation of the three scores.

Component scores have also been updated

Component	Old (gate/delay)	New (gate/delay)
Basic bit gates (AND/OR/NAND/NOR/NOT)	1/2	1/1
Bit Switch	1/2	2/1
Bit Delay Line	1/0	5/0

IO pins

There are now only 2 main types of component IO pins

Old Component	Replaced with
Input (any width)	Input (configured width)
Output (any width)	Output
Bidirectional (any width)	Output
Switched Output (any width)	Output (add Switch)

Output pins are now "unbuffered" and will propagate Z-state. If this is not desired add a static indexer, or other nop component to coerce Z-state to zero.

Output pins will inherit the width of the connected wire/component feeding them.

The various widths of input pins have been merged in to a single Input Pin with a configurable width, including 1.

To convert the old Switched Outputs you need to add a switch inside the CC before the new output pin.

IO pins are a different shape and larger then the used to be, this most affects 1-bit pins.

RAM/ROM/storage

The previous single block system of RAM; Fast RAM; Latency RAM; HDD has been replaced with a more modular and configurable system. There are now three base units:

• RAM
  • Standard memory.
  • Reads & writes take a single tick.
    • Load ready output pin does nothing.
  • Reset on reboot/simulation restart to either
    • all zeros,
    • some assembled code, or
    • the contents of some file.
• Latency RAM
  • Reads and writes have take a number of ticks during which other reads & writes are blocked.
  • Reset on reboot/simulation restart to either
    • all zeros,
    • some assembled code, or
    • the contents of some file.
• SSD
  • Persistent storage, NOT reset on reboot/simulation restart.
  • Reads & writes take a single tick.
    • Load ready output pin does nothing.
  • Can only write to it in the sandbox.

To be of much use the base unit will need some load and/or store ports. These are placed above and contigous to the base unit, the community somethimes calls these "hats" for that reason.

The ordering of load/store ports is significant: Actions on the storage happen in order from top to bottom. To get the old behavior the load port should be at the top, then the store port, then the base RAM unit at the bottom.

Any base unit may have any number (including zero, but that's not generally useful) of either sort of port. If two store ports write to the same address the lower (later) one wins.

The ordering of pins on memory has changed, circuits will need to be updated for both the larger size and the reordered IO pins.

Some general hints for converting memory components from old saves follow.

Program

The old Program has been removed. To get the upgraded assembler/editor place a "RAM" and a load port. Set the Initial Data to Assembler.

RAM

The old "slow" RAM and Fast RAM have been merged. You'll need to place a RAM base unit; a store port; and a load port.

To get the same behavior the load port must be on top of the store port. Connect the Address pin of load and store ports together.

Dual Load RAM

To replace the Dual Load RAM place a RAM, a store port and two load ports. The load ports must be above the store ports to recover the same behavior as before.

ROM

The old ROM has been removed to get the same behavior place an SSD and a load port. As of version 2.0.10 this configuration will be (mis-)labeled as RAM.

If you want to write to it in sandbox, you can also include a store port. The load port must be above the store port to recover the same behavior has before.

There is no way to configure a RAM or Latency RAM component so that it is writable only in sandbox.

HDD

The HDD has been removed, the closest replacement is the SSD, but the interface is different, you'll need to adapt your circuit.

File loader

For an updated File Loader use a RAM base unit, and a load port.

Set the Initial Data to File.

The interface is different, you'll need to adapt your connections to the changed pins.

Front Panel

For Add 5, place a RAM, a load port then set the Initial Data to Punch Card.

This feature is now available in any level.

Size changes

A number of components have changed size, most will have wrappers to preserve the form factor. These can be found in the old_components build menu. FIXME: Do these wrappers still get generated on a migration from 0.1059?

A few cannot be wrapped in this way and circuits using them will need to be adjusted:

• IO pins (all types, see above)
• RAM (all types), see above
• ROM, see above
• Front Panel, replaced with RAM, see above
• Program: Needs to replaced with RAM, see above

Circuits using components that have changed size so that some components now overlap will be unusable with "ghost" versions that can be moved. Once all of the overlaps have been resolved, and wires reconnected, the circuit can be used again.

Missing components

Bit Indexer and Byte Indexer are gone, use Static Indexer instead.

Display Matrix is gone, at least for the time being. But the larger Pixel Display is an alternative.

Network component is not currently available.

Sprite display is not currently available.

Component changes

• Keyboard: Some pins have switched places. The output Key up replaced with the inverse Key down.

Static values

There is new advanced feature of user configurable component sizes using Static Values and blue "width pins", this is best described on a new page (TODO).

Level changes

Components

In general custom components (CCs) are now allowed to be placed in (almost) all levels.

Any CCs that contain built-ins (even recursively) will not be included in that level's build menu.

Placing and then editing a CC to include a disallowed built-in will result in the level not being scored.

Outputs

Most levels now distinguish between disconnected(Z-state ) and zero or . If the level expects or 0 it will not accept .

Bit Switch is a the first level where this might be noticed, some previous solutions that output will no longer pass and need to be fixed.

Overture

The Overture opcodes have changed, but the Overture levels are relatively unchanged otherwise.

Operation	Old opcode	New opcode
OR	0	1
NAND	1	0
NOR	2	3
AND	3	2
ADD	4	4
SUB	5	5

This can be fixed by:

Expand

Spoiler

Replacing what used to be Byte OR gate with a Word NAND gate set to a width of 8 in your Overture ALU.

Condition	Old	New
Never	0	0
Always	4	1
Equal to 0	1	2
Not Equal to 0	5	3
Less than 0	2	4
Greater than or Equal to 0	6	5
Less than or Equal to 0	3	6
Greater than 0	7	7

This can be fixed by:

Expand

Spoiler

Rearranging the bits from the condition input.

LEG

The LEG levels in CPU Architecture 2, and beyond, have been completely replaced with the Symphony (a whole new architecture) levels, there are too many changes to list here.