Editing Known issues/2.0.16 (section)

== RAM ==

=== The level log is incomplete. ===

There are 4 new instructions, not the 2 listed in the level log:
* <code>0: load_8</code>
* <code>1: store_8</code>
* <code>2: load_16</code>
* <code>3: store_16</code>

The level log incorrectly states put the store port at the top, the 2 store ports should (for this level) be at the bottom, see below for my recommended ordering.

'''WORKAROUND''':
From bottom to top the ports attached to the program RAM block should be:
# a new 16-bit store port, then
# a new 8-bit store port.
# The existing 32 bit load port (used for instructions) should be moved above the store ports, then
# a new 16-bit load port, and finally,
# at the top, a new 8-bit load port.

The level log states that the <code>load</code> and <code>store</code> instructions should use "Argument B" as address parameter. For clarity this is exactly the same Argument B that the ALU uses. In other words: it is either the value in the register specified by the Argument B field in the instruction or the immediate in the instruction, depending on the <code>Is Immediate</code> flag.

As a further clarification, the <code>store</code> instructions should fetch data from the register file at the address determined by "argument A" and store that in program RAM. The level log might make it seem as though you should store the raw value of "argument A" taken from the instruction itself in program RAM, but that is not the case. Again this is exactly the same Argument A as used in ALU operations.