Editing Known issues/2.0.16 (section)

== Wire Spaghetti ==

[https://discord.com/channels/828292123936948244/1357728243456806984 RAM broken in Wire Spaghetti]

Various issues with RAM in Wire Spaghetti and following levels.

These stem from the lack of API in <code>text.si</code> to identify which RAM block is the program and which is the register file.

Before attempting the following workarounds, enable the bit-width tool by following the steps in the [[Known issues/2.0.16#Symphony Counter]] section above to modify your <code>levels.txt</code> file, if you have not done so already.  The bit-width tool will then be displayed below the wire comment tool and is required to set the bit size of the ram blocks during the following steps.  You can see how wide existing RAM is by the width of the orange highlight.

'''WORKAROUND A''':
# Delete the RAM for both register file and program.
# Set the bit width tool to 16, if you don't have it, see above or move onto B below.
# Place a 16-bit RAM for the register file (the size is hidden).
# Set the bit width tool to 32.
# Place a 32-bit RAM (again size is hidden) for the program.
# These steps should be taken in order. This might take several attempts, for reasons that are unclear to me.

'''WORKAROUND B''':
# Delete the RAM for both register file and program.
# Copy-paste a 16-bit RAM from sandbox for the register file, then
# Copy-paste a 32-bit RAM from sandbox for the program.
# These steps should be taken in order. This might take several attempts, for reasons that are unclear to me.

'''WORKAROUND C''':

If the above doesn't work, you can also try this, which has been reported to help.
# Remove the program counter (PC) from the level;
# Switch schematics to anything else for a moment;
# Return to the level;
# Replace the PC in its original place

[https://discord.com/channels/828292123936948244/1357729558547398837 Wire Spaghetti level log out of date]

The level log for Wire Spaghetti states:
3. Click "Edit link components" on the program component and then "Add register file". (do not connect the <code>zr</code> register)

This is now wrong, <code>zr</code> should be linked, as part of the register file.

=== RAM is byte addressed ===

The level log does not make clear that RAM is byte addressed (this is a change from 0.1059).

Since the register file entries are 16-bits (2 bytes) wide the register address should be adjusted to match.

=== r9 should have value 65535 not 0 ===

If you see this error on tick 62, then you are writing to and reading from the zero register, this is an error in your circuit, not a bug in the game.