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| File:Component AND.png | |
| Width | 1 |
|---|---|
| Type | 1bit |
| Unlocked by | AND Gate |
| Input One | Input Two | Output |
|---|---|---|
 0 |
0 |
0
|
0 |
 1 |
0
|
1 |
0 |
0
|
1 |
1 |
1
|
The 1-bit And gate takes two bits as its input, and only outputs a or 1 when both of the input bits are in the or 1 state.
| File:Component AND.png | |
| Width | 1 |
|---|---|
| Type | 1bit |
| Unlocked by | AND Gate |
Input One | Input Two | Output |
|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
The 1-bit And gate takes two bits as its input, and only outputs a 
or 1 when both of the input bits are in the or 1 state.
