(Added infobox and truth table) |
m (Completed truth table title) |
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| Line 6: | Line 6: | ||
{| {{Truthtable}} | {| {{Truthtable}} | ||
|+ Gate Truth Table | |+ OR Gate Truth Table | ||
|- | |- | ||
! Input One !! Input Two !! Output | ! Input One !! Input Two !! Output | ||
Latest revision as of 12:46, 30 August 2024
| File:Component OR.png | |
| Width | 1 |
|---|---|
| Type | 1bit |
| Unlocked by | OR Gate |
| Input One | Input Two | Output |
|---|---|---|
0 |
0 |
0
|
0 |
1 |
1
|
1 |
0 |
1
|
1 |
1 |
1
|
The 1-bit Or gate takes two inputs, and outputs a
or 1 when at least one of the inputs is in a
or 1 state. NOTE: It will still output
if both inputs are
.