Level/Counter - Revision history

Gelthor: Gelthor moved page Turing Complete/Counter to Level/Counter without leaving a redirect

2023-10-28T20:44:44Z

Gelthor moved page Turing Complete/Counter to Level/Counter without leaving a redirect

← Older revision	Revision as of 20:44, 28 October 2023
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Gelthor: 5 revisions imported: Imported from https://strategywiki.org/

2023-10-28T20:39:29Z

5 revisions imported: Imported from https://strategywiki.org/

← Older revision	Revision as of 20:39, 28 October 2023
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w:c:strategywiki>Henke37: Justify the register replacement

2023-03-27T16:17:11Z

Justify the register replacement

← Older revision		Revision as of 16:17, 27 March 2023
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	While this circuit works, it is somewhat ineffective. By specializing the used components, it is possible to reduce both the delay and gate scores.		While this circuit works, it is somewhat ineffective. By specializing the used components, it is possible to reduce both the delay and gate scores.

	The ~~first optimization~~ is to ~~replace~~ the ~~register~~ with a delay line. Since the 8bit component isn't allowed in this level, use eight 1bit delay lines instead.		The register is being used as a delay line. There is no need to pay for the extra features, so it can be replaced with an actual delay line. Since the 8bit component isn't allowed in this level, use eight 1bit delay lines instead.

	The second optimization is to special case the adder for the task of incrementing by one. By assuming the hardcoded input of 00000001 and looking at individual full adder implementations it becomes obvious that many gates are pointless.		The second optimization is to special case the adder for the task of incrementing by one. By assuming the hardcoded input of 00000001 and looking at individual full adder implementations it becomes obvious that many gates are pointless.

w:c:strategywiki>Henke37: Remove incorrect observation

2023-03-27T14:41:03Z

Remove incorrect observation

← Older revision		Revision as of 14:41, 27 March 2023
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	The second optimization is to special case the adder for the task of incrementing by one. By assuming the hardcoded input of 00000001 and looking at individual full adder implementations it becomes obvious that many gates are pointless.		The second optimization is to special case the adder for the task of incrementing by one. By assuming the hardcoded input of 00000001 and looking at individual full adder implementations it becomes obvious that many gates are pointless.

	The ones bit always toggles, so a simple bit inverter can be used~~. Since it always toggles, it always has a carry out, this can further be assumed for the next bit~~.		The ones bit always toggles, so a simple bit inverter can be used.

	The twos bit toggles if the ones bit was set. This can be generalized as a bit toggling only if all previous bits were set. A simple chain of AND gates can be used to detect which bits need to be toggled.		The twos bit toggles if the ones bit was set. This can be generalized as a bit toggling only if all previous bits were set. A simple chain of AND gates can be used to detect which bits need to be toggled.

w:c:strategywiki>Henke37: Remove pointless tradeoff

2023-03-20T21:52:05Z

Remove pointless tradeoff

← Older revision		Revision as of 21:52, 20 March 2023
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	The ones bit always toggles, so a simple bit inverter can be used. Since it always toggles, it always has a carry out, this can further be assumed for the next bit.		The ones bit always toggles, so a simple bit inverter can be used. Since it always toggles, it always has a carry out, this can further be assumed for the next bit.

	The twos bit toggles if the ones bit was set. This can be generalized as a bit toggling only if all previous bits were set. A simple chain of AND gates can be used to detect which bits need to be toggled~~. Using a few extra 3 input AND gates can lower the delay score at the cost of redundant gates~~.		The twos bit toggles if the ones bit was set. This can be generalized as a bit toggling only if all previous bits were set. A simple chain of AND gates can be used to detect which bits need to be toggled.

	[[File:Turing Complete Counter Optimized.png]]		[[File:Turing Complete Counter Optimized.png]]

	{{Footer Nav\|game=Turing Complete\|prevpage=Little Box\|nextpage=Arithmetic Engine}}		{{Footer Nav\|game=Turing Complete\|prevpage=Little Box\|nextpage=Arithmetic Engine}}

w:c:strategywiki>Henke37: Go for the achievement

2023-03-20T21:33:32Z

Go for the achievement

← Older revision		Revision as of 21:33, 20 March 2023
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	And to complete it, wire the Output pin of the Register to the output pin.		And to complete it, wire the Output pin of the Register to the output pin.

			== Optimizations ==

			{{achievement
			\|name=Binary Counter
			\|image=Turing Complete achievement Binary Counter.jpg
			\|description=Complete the Counter level with a 65 gate score or less
			}}

			While this circuit works, it is somewhat ineffective. By specializing the used components, it is possible to reduce both the delay and gate scores.

			The first optimization is to replace the register with a delay line. Since the 8bit component isn't allowed in this level, use eight 1bit delay lines instead.

			The second optimization is to special case the adder for the task of incrementing by one. By assuming the hardcoded input of 00000001 and looking at individual full adder implementations it becomes obvious that many gates are pointless.

			The ones bit always toggles, so a simple bit inverter can be used. Since it always toggles, it always has a carry out, this can further be assumed for the next bit.

			The twos bit toggles if the ones bit was set. This can be generalized as a bit toggling only if all previous bits were set. A simple chain of AND gates can be used to detect which bits need to be toggled. Using a few extra 3 input AND gates can lower the delay score at the cost of redundant gates.

			[[File:Turing Complete Counter Optimized.png]]

	{{Footer Nav\|game=Turing Complete\|prevpage=Little Box\|nextpage=Arithmetic Engine}}		{{Footer Nav\|game=Turing Complete\|prevpage=Little Box\|nextpage=Arithmetic Engine}}

w:c:strategywiki>Henke37: First complicated wiring job

2023-02-06T19:55:57Z

First complicated wiring job

New page

{{Header Nav|game=Turing Complete}}

For this level you have to create a component that either increments by one each tick or loads a new value.

[[File:Turing Complete Counter.png]]

Since you need to store a value between ticks, place a Register component. Add an Always On component and wire it to both the Load and Store pins of the Register.

Hook up a Mux component to the Save value pin of the register. Wire the numerical input pin to the Input 2 pin of the Mux. Wire the bit input pin to the Select 1/2 pin on the Mux.

Finally add an Add component. Wire the Carry IN pin to the Always On component and the Input 1 pin to the Output pin of the Register. Wire the Result pin of the Add component to the Input 1 pin on the Mux.

And to complete it, wire the Output pin of the Register to the output pin.

{{Footer Nav|game=Turing Complete|prevpage=Little Box|nextpage=Arithmetic Engine}}