Editing Known issues/2.0.16

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{{Early-access-version|2|0.16|apha}}

A number of levels in version are known to be broken, and require some workarounds to complete. Some of these issues affect multiple levels, I only give the first level you are likely to come across them.

== Unofficial partial fixes ==

Some of the levels can be fixed by replacing the game's campaign folder with an amended version from GitHub, provided by the user ERYK500.

* [https://github.com/ERYK500/tc_campaign/ https://github.com/ERYK500/tc_campaign/]

{{Note|These are '''UNOFFICIAL''' patches - Please do not report problems to the game's developer. Instead, post on the TC Discord server in the <code>#new-patch-talk</code> channel.}}

This is a limited fix as some of the issues are engine limitations, which require a game update to resolve.

== Symphony Counter ==

[https://discord.com/channels/828292123936948244/1357725850828673305 Missing bit-width tool and 16-bit]

You should be able to place 16-bit components, but the bit-width tool might not be present in the level.

You can try pasting the following line into <code>levels.txt</code> (which is found in your save folder, check the location in Options):
<pre>symphony_register_1,true,10000,10000,0,Default
</pre>

If your game is running, restart the game to ensure the changes take effect.

Some people report that the bit-width tool appears simply by going to the Sandbox then component factory. This works only if you first hoover the cursor over wire colors tool in a way that color panel stays open when the cursor is moved away and than click on Sandbox button.

If that does not work you can copy-paste 16-bit components from the sandbox.

== Wire Spaghetti ==

[https://discord.com/channels/828292123936948244/1357728243456806984 RAM broken in Wire Spaghetti]

Various issues with RAM in Wire Spaghetti and following levels.

These stem from the lack of API in <code>text.si</code> to identify which RAM block is the program and which is the register file.

Before attempting the following workarounds, enable the bit-width tool by following the steps in the [[Known issues/2.0.16#Symphony Counter]] section above to modify your <code>levels.txt</code> file, if you have not done so already.  The bit-width tool will then be displayed below the wire comment tool and is required to set the bit size of the ram blocks during the following steps.

'''WORKAROUND A''':
# Delete the RAM for both register file and program.
# Set the bit width tool to 16, if you don't have it, see above or move onto B below.
# Place a 16-bit RAM for the register file (the size is hidden).
# Set the bit width tool to 32.
# Place a 32-bit RAM (again size is hidden) for the program.
# These steps should be taken in order. This might take several attempts, for reasons that are unclear to me.

'''WORKAROUND B''':
# Delete the RAM for both register file and program.
# Copy-paste a 16-bit RAM from sandbox for the register file, then
# Copy-paste a 32-bit RAM from sandbox for the program.
# These steps should be taken in order. This might take several attempts, for reasons that are unclear to me.

'''WORKAROUND C''':

If the above doesn't work, you can also try this, which has been reported to help.
# Remove the program counter (PC) from the level;
# Switch schematics to anything else for a moment;
# Return to the level;
# Replace the PC in its original place

[https://discord.com/channels/828292123936948244/1357729558547398837 Wire Spaghetti level log out of date]

The level log for Wire Spaghetti states:
3. Click "Edit link components" on the program component and then "Add register file". (do not connect the <code>zr</code> register)

This is now wrong, <code>zr</code> should be linked, as part of the register file.

=== RAM is byte addressed ===

The level log does not make clear that RAM is byte addressed (this is a change from 0.1059).

Since the register file entries are 16-bits (2 bytes) wide the register address should be adjusted to match.

=== r9 should have value 65535 not 0 ===

If you see this error on tick 62, then you are writing to and reading from the zero register, this is an error in your circuit, not a bug in the game.

== Integrating ALU ==

The ALU you previous built has a multiply instruction. The tests for Integrating ALU assume <code>mul</code> returns zero.

'''WORKAROUND''': Delete or otherwise disable the multiply component inside the ALU custom component.

== RAM ==

=== The level log is incomplete. ===

There are 4 new instructions, not the 2 listed in the level log:
* <code>0: load_8</code>
* <code>1: store_8</code>
* <code>2: load_16</code>
* <code>3: store_16</code>

The level log incorrectly states put the store port at the top, the 2 store ports should (for this level) be at the bottom, see below for my recommended ordering.

'''WORKAROUND''':
From bottom to top the ports attached to the program RAM block should be:
# a new 16-bit store port, then
# a new 8-bit store port.
# The existing 32 bit load port (used for instructions) should be moved above the store ports, then
# a new 16-bit load port, and finally,
# at the top, a new 8-bit load port.

== Instruction aliases ==

=== Level fails to compile due to wrong meta.txt ===

Edit <code>Turing Complete\campaign\symphony_9_aliases\meta.txt</code> (found in the game's install folder, not your save files) and delete the last 4 lines of default_assembly, so that the section reads

<pre>default_assembly = `
in r1
mov r2, r1
neg r3, r2
not r4, r2
`</pre>

=== Level fails due to wrong test.si ===

Edit <code>Turing Complete\campaign\symphony_9_aliases\test.si</code> and replace the it all with

<pre>def get_input($scratch_space: [Int], tick: Int, $inputs: [Int]) {
    inputs[0] = 10
}

def check_output($scratch_space: [Int], tick: Int, inputs: [Int], outputs: [Int]) TestResult {
    switch tick
        0 {
            if get_register_value(1) != 10 {
                set_error(`The first instruction is supposed to move the input value (10) to r1.`)
                return fail
            }
        }
        1 {
            if get_register_value(2) != 10 {
                set_error(`The first instruction is supposed to move the input value (10) to r2.`)
                return fail
            }
        }
        2 {
            if get_register_value(3) != 65526 {
                set_error(`Negate r2 and store the result (65526) in r3.`)
                return fail
            }
        }
        3 {
            if get_register_value(4) != 65525 {
                set_error(`NOT r2 and store the result (-9) in r4.`)
                return fail
            }
            return win
        } 
}</pre>

== Various levels ==

A number of levels' meta.txt have out of date spec.isa, these can be fixed with a simple regex
<pre>
s/(^|  )([01][01])0/$10$2/g
</pre>
Description	What you type	What you get
Italic	''Italic text''	Italic text
Bold	'''Bold text'''	Bold text
Bold & italic	'''''Bold & italic text'''''	*Bold & italic text*